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SN74ALS323

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具有同步清零功能和三态输出的 8 位通用移位/存储寄存器

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SN74ALS323

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产品详情

Configuration Universal Bits (#) 8 Technology family ALS Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Input type Bipolar Output type 3-State Clock frequency (MHz) 17 IOL (max) (mA) 24 IOH (max) (mA) -2.6 Supply current (max) (µA) 40000 Features High speed (tpd 10-50ns) Operating temperature range (°C) 0 to 70 Rating Catalog
Configuration Universal Bits (#) 8 Technology family ALS Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Input type Bipolar Output type 3-State Clock frequency (MHz) 17 IOL (max) (mA) 24 IOH (max) (mA) -2.6 Supply current (max) (µA) 40000 Features High speed (tpd 10-50ns) Operating temperature range (°C) 0 to 70 Rating Catalog
PDIP (N) 20 228.702 mm² 24.33 x 9.4
  • Multiplexed I/O Ports Provide Improved Bit Density
  • Four Modes of Operation:
    • Hold (Store)
    • Shift Right
    • Shift Left
    • Load Data
  • Operate With Outputs Enabled or at High Impedance
  • 3-State Outputs Drive Bus Lines Directly
  • Can Be Cascaded for n-Bit Word Lengths
  • Synchronous Clear
  • Applications:
    • Stacked or Push-Down Registers
    • Buffer Storage
    • Accumulator Registers
  • Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs
  • Multiplexed I/O Ports Provide Improved Bit Density
  • Four Modes of Operation:
    • Hold (Store)
    • Shift Right
    • Shift Left
    • Load Data
  • Operate With Outputs Enabled or at High Impedance
  • 3-State Outputs Drive Bus Lines Directly
  • Can Be Cascaded for n-Bit Word Lengths
  • Synchronous Clear
  • Applications:
    • Stacked or Push-Down Registers
    • Buffer Storage
    • Accumulator Registers
  • Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs

These 8-bit universal shift/storage registers feature multiplexed input/output (I/O) ports to achieve full 8-bit data handling in a 20-pin package. Two function-select (S0, S1) inputs and two output-enable (OE1\, OE2\) inputs can be used to choose the modes of operation listed in the function table.

Synchronous parallel loading is accomplished by taking both S0 and S1 high. This places the 3-state outputs in the high-impedance state and permits data applied on the I/O ports to be clocked into the register. Reading out of the register can be accomplished while the outputs are enabled in any mode. Clearing occurs synchronously when the clear (CLR\) input is low. Taking either OE1\ or OE2\ high disables the outputs but has no effect on clearing, shifting, or storing data.

The SN54ALS323 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS323 is characterized for operation from 0°C to 70°C.

These 8-bit universal shift/storage registers feature multiplexed input/output (I/O) ports to achieve full 8-bit data handling in a 20-pin package. Two function-select (S0, S1) inputs and two output-enable (OE1\, OE2\) inputs can be used to choose the modes of operation listed in the function table.

Synchronous parallel loading is accomplished by taking both S0 and S1 high. This places the 3-state outputs in the high-impedance state and permits data applied on the I/O ports to be clocked into the register. Reading out of the register can be accomplished while the outputs are enabled in any mode. Clearing occurs synchronously when the clear (CLR\) input is low. Taking either OE1\ or OE2\ high disables the outputs but has no effect on clearing, shifting, or storing data.

The SN54ALS323 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS323 is characterized for operation from 0°C to 70°C.
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类型 标题 下载最新的英语版本 日期
* 数据表 8-Bit Universal Shift/Storage Registers With Synchronous Clear And 3-St Outputs 数据表 (Rev. A) 1994年 12月 1日

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包含信息：
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息：
  • 制造厂地点
  • 封装厂地点

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