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TIDEP0043

Acontis EtherCAT Master Stack Reference Design

Design files

TIDEP0043

Design files

Overview

The acontis EC-Master EtherCAT Master stack is a highly portable software stack that can be used on various embedded platforms. The EC-Master supports the high performance TI Sitara MPUs,  it provides a sophisticated EtherCAT Master solution which customers can use to implement EtherCAT communication interface boards, EtherCAT based PLC or motion control applications. The EC-Master architectural design does not require additional tasks to be scheduled, thus the full stack functionality is available even on an OS less platform such as TI Starterware suported on AM335x. Due to this architecture combined with the high speed Ethernet driver it is possible to implement EtherCAT master based applications on the Sitara platform with short cycle times of 100 microseconds or even below.

Features
  • EtherCAT Class A or Class B master stack according to ETG.1500 specification
  • High performance CPSW Ethernet driver for maximum EtherCAT performance
  • EtherCAT Feature Pack Cable Redundancy using two CPSW ports
  • EtherCAT Feature Pack Hot Connect to support flexible configuration
  • Support for various operating systems: Linux, TI-RTOS (SYS/BIOS) and partner OS such as VxWorks and QNX
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Design files & products

Design files

Download ready-to-use system files to speed your design process.

download Design guide — TIDEP0043
TIDUAF8A.PDF (198 KB)

Reference design overview and verified performance test data

download Bill of materials (BOM) — TIDEP0043
TIDR339A.ZIP (37 KB)

Complete listing of design components, reference designators, and manufacturers/part numbers

download PCB layout — TIDEP0043
TIDC179A.ZIP (3016 KB)

PCB layer plot file used for generating PCB design layout

download Schematic — TIDEP0043
TIDR336.ZIP (768 KB)

Detailed schematic diagram for design layout and components

Products

Includes TI products in the design and potential alternatives.

Linear & low-dropout (LDO) regulators

TPS717 — 150-mA, high-PSRR, low-IQ, low-dropout voltage regulator with enable

Data sheet: PDF | HTML
Clock generators

CDCE913 — Programmable 1-PLL VCXO clock synthesizer with 2.5-V or 3.3-V LVCMOS outputs

Data sheet: PDF | HTML
Inverting buffers & drivers

SN74LVC1G06 — Single 1.65-V to 5.5-V inverter with open-drain outputs

Data sheet: PDF | HTML
Protocol & bus switches & muxes

SN74CBTLV3257 — 3.3-V, 2:1 (SPDT), 4-channel analog switch with partial-power-down mode

Data sheet: PDF | HTML
Noninverting buffers & drivers

SN74LVC1G07 — Single 1.65-V to 5.5-V buffer with open-drain outputs

Data sheet: PDF | HTML
ESD protection diodes

TPD4S012 — Quad 0.8-pF, 5.5-V, ±10-kV ESD protection diode with 15-V tolerant Vbus for USB Interface<

Data sheet: PDF | HTML
Multimedia & industrial networking SoCs

AM4376 — Sitara processor: Arm Cortex-A9, PRU-ICSS

Data sheet: PDF | HTML
D-type flip-flops

SN74ALVCH16374 — 16-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs

Data sheet: PDF
Multimedia & industrial networking SoCs

AM4377 — Sitara processor: Arm Cortex-A9, PRU-ICSS, EtherCAT

Data sheet: PDF | HTML
Multi-channel ICs (PMICs)

TPS65910 — Integrated Power Management IC (PMIC) w/ 4 DC/DCs, 8 LDOs and RTC in 6x6mm QFN family

Data sheet: PDF | HTML
Multimedia & industrial networking SoCs

AM4378 — Sitara processor: Arm Cortex-A9, PRU-ICSS, 3D graphics

Data sheet: PDF | HTML
Multimedia & industrial networking SoCs

AM4379 — Sitara processor: Arm Cortex-A9, PRU-ICSS, EtherCAT, 3D graphics

Data sheet: PDF | HTML
ESD protection diodes

TPD6E001 — 6 channel 1.5-pF, 5.5-V, ±8-kV ESD protection diode with 1-nA max leakage & VCC pin for USB 2.0

Data sheet: PDF | HTML
Multimedia & industrial networking SoCs

AM3358-EP — Sitara processor: Arm Cortex-A8, 3D, PRU-ICSS, HiRel, CAN

Data sheet: PDF | HTML
DC/DC converters

TPS5420 — 5.5V to 36V Input, 2A, 500kHz Step-Down Converter

Data sheet: PDF | HTML
Analog temperature sensors

LM94022 — ±1.5°C Temperature Sensor with Multiple Gain and Class-AB Analog Output

Data sheet: PDF | HTML
Multimedia & industrial networking SoCs

AM3357 — Sitara processor: Arm Cortex-A8, EtherCAT, PRU-ICSS, CAN

Data sheet: PDF | HTML
OR gates

SN74LVC1G32 — 1-ch, 2-input 1.65-V to 5.5-V 32-mA drive strength OR gate

Data sheet: PDF | HTML
Multimedia & industrial networking SoCs

AM3359 — Sitara processor: Arm Cortex-A8, EtherCAT, 3D, PRU-ICSS, CAN

Data sheet: PDF | HTML
Automotive LED drivers

TPIC2810 — 8-bit LED driver with I2C interface

Data sheet: PDF
Ethernet PHYs

TLK110 — Industrial 10/100 Ethernet PHY

Data sheet: PDF
AND gates

SN74AUP2G08 — 2-ch, 2-input 0.8-V to 3.6-V low power (< 1uA) AND gate

Data sheet: PDF | HTML
I2C & SPI general-purpose I/Os (GPIOs)

PCA9536 — 4-bit 2.3- to 5.5-V I2C/SMBus I/O expander with config registers

Data sheet: PDF | HTML

Start development

Hardware development

Evaluation board

TMDSICE3359 — AM3359 Industrial Communications Engine

The acontis EC-Master EtherCAT Master stack is a highly portable software stack that can be used on various embedded platforms. The EC-Master supports the high performance TI Sitara MPUs,  it provides a sophisticated EtherCAT Master solution which customers can use to implement EtherCAT (...)

EVM user’s guide: PDF
Supported products & hardware

Supported products & hardware

Hardware development
Reference design
TIDEP-0075 — Industrial Communications Gateway PROFINET IRT to PROFIBUS Master Reference Design TIDEP-0085 — Simple Open Real-Time Ethernet (SORTE) Master With PRU-ICSS Reference Design TIDEP-0086 — Simple Open Real-Time Ethernet (SORTE) Device With PRU-ICSS Reference Design TIDEP-0089 — CC-Link IE Field Basic Master and Slave Reference Design TIDEP0002 — PROFIBUS Communications Development Platform TIDEP0003 — Ethernet/IP Communications Dev Platform TIDEP0008 — PROFINET Communications Dev Platform TIDEP0010 — Sercos 3 on AM335x TIDEP0027 — High Performance Pulse Train Output (PTO) with PRU-ICSS for Industrial Applications Reference Design TIDEP0028 — Ethernet Powerlink Development Platform Reference Design TIDEP0029 — Certified Profinet IRT V2.3 Device with 1 GHz ARM Application Processor TIDEP0032 — Multi-Protocol Industrial Communications TIDEP0043 — Acontis EtherCAT Master Stack Reference Design TIDEP0049 — "Fast startup” feature of industrial Ethernet for AM335x TIDEP0053 — High-availability Seamless Redundancy (HSR) Ethernet for Substation Automation Reference Design TIDEP0054 — Parallel Redundancy Protocol (PRP) Ethernet Reference Design for Substation Automation TIDEP0061 — 4-Axis CNC Router with 250-kHz Control Loop with PRU-ICSS based on SORTE Reference Design
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TMDSICE3359 — AM3359 Industrial Communications Engine

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Hardware development
Reference design
TIDEP-0075 — Industrial Communications Gateway PROFINET IRT to PROFIBUS Master Reference Design TIDEP-0085 — Simple Open Real-Time Ethernet (SORTE) Master With PRU-ICSS Reference Design TIDEP-0086 — Simple Open Real-Time Ethernet (SORTE) Device With PRU-ICSS Reference Design TIDEP-0089 — CC-Link IE Field Basic Master and Slave Reference Design TIDEP0002 — PROFIBUS Communications Development Platform TIDEP0003 — Ethernet/IP Communications Dev Platform TIDEP0008 — PROFINET Communications Dev Platform TIDEP0010 — Sercos 3 on AM335x TIDEP0027 — High Performance Pulse Train Output (PTO) with PRU-ICSS for Industrial Applications Reference Design TIDEP0028 — Ethernet Powerlink Development Platform Reference Design TIDEP0029 — Certified Profinet IRT V2.3 Device with 1 GHz ARM Application Processor TIDEP0032 — Multi-Protocol Industrial Communications TIDEP0043 — Acontis EtherCAT Master Stack Reference Design TIDEP0049 — "Fast startup” feature of industrial Ethernet for AM335x TIDEP0053 — High-availability Seamless Redundancy (HSR) Ethernet for Substation Automation Reference Design TIDEP0054 — Parallel Redundancy Protocol (PRP) Ethernet Reference Design for Substation Automation TIDEP0061 — 4-Axis CNC Router with 250-kHz Control Loop with PRU-ICSS based on SORTE Reference Design
TI’s Standard Terms and Conditions for Evaluation Items apply.

Technical documentation

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* Design guide EtherCAT Master Stack for TI Sitara CPU Family Design Guide (Rev. A) Jul 19, 2016

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