CSD25202W15
-20-V, P channel NexFET™ power MOSFET, single WLP 1.5 mm x 1.5 mm, 26 mOhm, gate ESD protection
CSD25202W15
- Low-Resistance
- Small Footprint 1.5 mm × 1.5 mm
- Gate ESD Protection –3 kV
- Pb Free
- RoHS Compliant
- Halogen Free
- Gate-Source Voltage Clamp
This 21 mΩ, 20 V device is designed to deliver the lowest on resistance and gate charge in a small 1.5 mm × 1.5 mm chip scale package with excellent thermal characteristics in an ultra-low profile. Low on resistance coupled with the small footprint and low profile make the device ideal for battery operated space constrained applications.
Technical documentation
Type | Title | Date | ||
---|---|---|---|---|
* | Data sheet | CSD25202W15 20-V P-Channel NexFET Power MOSFET datasheet (Rev. A) | PDF | HTML | 16 Jul 2014 |
Application note | MOSFET Support and Training Tools (Rev. F) | PDF | HTML | 14 Jun 2024 | |
Application note | Semiconductor and IC Package Thermal Metrics (Rev. D) | PDF | HTML | 25 Mar 2024 | |
Application note | Using MOSFET Transient Thermal Impedance Curves In Your Design | PDF | HTML | 18 Dec 2023 | |
Application note | Solving Assembly Issues with Chip Scale Power MOSFETs | PDF | HTML | 14 Dec 2023 | |
Application note | Using MOSFET Safe Operating Area Curves in Your Design | PDF | HTML | 13 Mar 2023 | |
Application brief | Tips for Successfully Paralleling Power MOSFETs | PDF | HTML | 31 May 2022 | |
More literature | WCSP Handling Guide | 07 Nov 2019 | ||
Application note | AN-1112 DSBGA Wafer Level Chip Scale Package (Rev. AI) | 14 Jun 2019 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.
Package | Pins | CAD symbols, footprints & 3D models |
---|---|---|
DSBGA (YZF) | 9 | Ultra Librarian |
Ordering & quality
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