DS90LV047A
- >400-Mbps (200 MHz) Switching Rates
- Flow-Through Pinout Simplifies PCB Layout
- 300-ps Typical Differential Skew
- 400-ps Maximum Differential Skew
- 1.7-ns Maximum Propagation Delay
- 3.3-V Power Supply Design
- ±350-mV Differential Signaling
- Low Power Dissipation (13 mW at 3.3-V Static)
- Interoperable With Existing 5-V LVDS Receivers
- High impedance on LVDS Outputs on Power Down
- Conforms to TIA/EIA-644 LVDS Standard
- Industrial Operating Temperature Range (–40°C to +85°C)
- Available in Surface Mount SOIC and Low Profile TSSOP Package
The DS90LV047A device is a quad CMOS flow-through differential line driver designed for applications requiring ultra-low power dissipation and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) using Low Voltage Differential Signaling (LVDS) technology.
The DS90LV047A accepts low voltage TTL/CMOS input levels and translates them to low voltage (350 mV) differential output signals. In addition, the driver supports a TRI-STATE function that may be used to disable the output stage, disabling the load current, and thus dropping the device to an ultra low idle power state of 13 mW typical. The DS90LV047A has a flow-through pinout for easy PCB layout.
The EN and EN∗ inputs are ANDed together and control the TRI-STATE outputs. The enables are common to all four drivers. The DS90LV047A and companion line receiver (DS90LV048A) provide a new alternative to high power psuedo-ECL devices for high speed point-to-point interface applications.
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技术文档
| 顶层文档 | 类型 | 标题 | 格式选项 | 下载最新的英语版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 数据表 | DS90LV047A 3-V LVDS Quad CMOS Differential Line Driver 数据表 (Rev. D) | PDF | HTML | 2016-7-29 | ||
| 应用手册 | 低压差分信号 (LVDS) 在 LED 灯墙中的应用 | 英语版 | 2022-5-19 | |||
| 应用手册 | Applications of Low-Voltage Differential Signaling (LVDS) in Ultrasound Scanners | 2019-6-29 | ||||
| 应用简报 | LVDS to Improve EMC in Motor Drives | 2018-9-27 | ||||
| 应用简报 | How Far, How Fast Can You Operate LVDS Drivers and Receivers? | 2018-8-3 | ||||
| 应用简报 | How to Terminate LVDS Connections with DC and AC Coupling | 2018-5-16 | ||||
| 应用手册 | An Overview of LVDS Technology | 1998-10-5 |
设计与开发
如需其他信息或资源，请点击以下任一标题进入详情页面查看（如有）。
DS90LV047-48AEVM — DS90LV047-48AEVM 评估模块
| 封装 | 引脚 | CAD 符号、封装和 3D 模型 |
|---|---|---|
| SOIC (D) | 16 | Ultra Librarian |
| TSSOP (PW) | 16 | Ultra Librarian |
订购和质量
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