TPS7A7200

ACTIVE

2-A, low-VIN (1.43-V), ultra-low-dropout voltage regulator with power good & enable

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Same functionality with different pin-out to the compared device
TPS7A92 ACTIVE 2-A, low-noise, high-PSRR, adjustable ultra-low-dropout voltage regulator with high-accuracy 2-A, low noise (4.7-µVrms) LDO in a small package (2.5 mm x 2.5 mm).
Similar functionality to the compared device
TPS7A83A ACTIVE 2-A, low-VIN (1.1-V), low-noise, high-accuracy, ultra-low-dropout voltage regulator with power good 2-A LDO with low-noise (4.4 µVrms) and low-dropout (200 mV) and improved accuracy (0.75%).

Product details

Output options Adjustable Output, Fixed Output Iout (max) (A) 2 Vin (max) (V) 6.5 Vin (min) (V) 1.43 Vout (max) (V) 5 Vout (min) (V) 0.9 Rating Catalog Noise (µVrms) 40 PSRR at 100 KHz (dB) 25 Iq (typ) (mA) 4 Thermal resistance θJA (°C/W) 36 Load capacitance (min) (µF) 4.7 Regulated outputs (#) 1 Features Enable, Power good, Soft start Accuracy (%) 1.5 Dropout voltage (Vdo) (typ) (mV) 180 Operating temperature range (°C) -40 to 125
Output options Adjustable Output, Fixed Output Iout (max) (A) 2 Vin (max) (V) 6.5 Vin (min) (V) 1.43 Vout (max) (V) 5 Vout (min) (V) 0.9 Rating Catalog Noise (µVrms) 40 PSRR at 100 KHz (dB) 25 Iq (typ) (mA) 4 Thermal resistance θJA (°C/W) 36 Load capacitance (min) (µF) 4.7 Regulated outputs (#) 1 Features Enable, Power good, Soft start Accuracy (%) 1.5 Dropout voltage (Vdo) (typ) (mV) 180 Operating temperature range (°C) -40 to 125
VQFN (RGT) 16 9 mm² 3 x 3 VQFN (RGW) 20 25 mm² 5 x 5
  • Low-dropout voltage: 180 mV at 2 A
  • V IN range: 1.5 V to 6.5 V
  • Configurable fixed V OUT range: 0.9 V to 3.5 V
  • Adjustable V OUT range: 0.9 V to 5 V
  • Very good load- and line-transient response
  • Stable with ceramic output capacitor
  • 1.5% accuracy overline, overload, and overtemperature
  • Programmable soft-start
  • Power-good (PG) output
  • Package s:
    • 3-mm × 3-mm, 16-pin VQFN
    • 5-mm × 5-mm, 20-pin VQFN
  • Low-dropout voltage: 180 mV at 2 A
  • V IN range: 1.5 V to 6.5 V
  • Configurable fixed V OUT range: 0.9 V to 3.5 V
  • Adjustable V OUT range: 0.9 V to 5 V
  • Very good load- and line-transient response
  • Stable with ceramic output capacitor
  • 1.5% accuracy overline, overload, and overtemperature
  • Programmable soft-start
  • Power-good (PG) output
  • Package s:
    • 3-mm × 3-mm, 16-pin VQFN
    • 5-mm × 5-mm, 20-pin VQFN

The TPS7A7200 low-dropout (LDO) voltage regulator is designed for applications requiring very-low dropout capability ( 180 mV at 2 A) with an input voltage from 1.5 V to 6.5 V. The TPS7A7200 offers an innovative, user-configurable, output-voltage setting from 0.9 V to 3.5 V, thus eliminating external resistors and any associated errors.

The TPS7A7200 has very fast load-transient response, is stable with ceramic output capacitors, and supports a better than 2% accuracy over line, load, and temperature. A soft-start pin allows for an application to reduce inrush into the load. Additionally, an open-drain, power-good signal allows for sequencing power rails.

The TPS7A7200 is available in 3-mm × 3-mm, 16-pin VQFN and 5-mm × 5-mm, 20-pin VQFN packages.

The TPS7A7200 low-dropout (LDO) voltage regulator is designed for applications requiring very-low dropout capability ( 180 mV at 2 A) with an input voltage from 1.5 V to 6.5 V. The TPS7A7200 offers an innovative, user-configurable, output-voltage setting from 0.9 V to 3.5 V, thus eliminating external resistors and any associated errors.

The TPS7A7200 has very fast load-transient response, is stable with ceramic output capacitors, and supports a better than 2% accuracy over line, load, and temperature. A soft-start pin allows for an application to reduce inrush into the load. Additionally, an open-drain, power-good signal allows for sequencing power rails.

The TPS7A7200 is available in 3-mm × 3-mm, 16-pin VQFN and 5-mm × 5-mm, 20-pin VQFN packages.

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Technical documentation

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Type Title Date
* Data sheet TPS7A7200 2-A,Fast-Transient, Low-Dropout Voltage Regulator datasheet (Rev. G) PDF | HTML 30 Oct 2023
White paper Parallel LDO Architecture Design Using Ballast Resistors PDF | HTML 14 Dec 2022
White paper Comprehensive Analysis and Universal Equations for Parallel LDO's Using Ballast PDF | HTML 13 Dec 2022
Selection guide Low Dropout Regulators Quick Reference Guide (Rev. P) 21 Mar 2018
Application note ANY-OUT™ LDO Controlled by I2C™ IO Expander Device (Rev. A) 20 Sep 2012
Application note ANY-OUT™ LDO Controlled by I2C™ IO Expander Device 29 May 2012
User guide TPS7A7x00EVM-718 Evaluation Module 28 Feb 2012

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

ADC32RF42EVM — ADC32RF42 Dual-Channel, 14-Bit, 1.5GSPS, RF-Sampling ADC Evaluation Module

The ADC32RF42 evaluation module (EVM) demonstrates the performance of a dual 1.5-GSPS 14-bit analog-to-digital converter (ADC) with the JESD204B interface. The EVM includes the ADC32RF42 device, and JESD204B clocking is provided by the LMK04828 and TI voltage regulators to provide the necessary (...)

User guide: PDF
Not available on TI.com
Evaluation board

TPS7A7200EVM-718 — TPS7A7200 Low-Dropout (LDO) Linear Regulator Evaluation Module

The Texas Instruments TPS7A7200EVM-718 is a fully assembled and tested Evaluation Module (EVM) for evaluating the TPS7A7200 Low-Dropout Regulator at any of its pin-selectable output voltages (1V to 3.5V in 50mV increments). The EVM circuit is configured to be a reference design for engineering (...)
User guide: PDF
Not available on TI.com
Simulation model

TPS7A7200 PSpice Transient Model

SBVM149.ZIP (1050 KB) - PSpice Model
Simulation model

TPS7A7200 Unencrypted PSpice Model

SBVM636.ZIP (1 KB) - PSpice Model
Reference designs

TIDA-01161 — 1-GHz Signal Bandwidth RF Sampling Receiver Reference Design

The RF sampling architecture offers an alternative to the traditional super-heterodyne architecture. An RF sampling analog-to-digital converter (ADC) operates at a high sampling rate and converts signals directly from radio frequencies (RF) to digital. Because of the high sampling rate, the RF (...)
Design guide: PDF
Schematic: PDF
Reference designs

TIDA-01442 — Direct RF-Sampling Radar Receiver for L-, S-, C-, and X-Band Using ADC12DJ3200 Reference Design

This reference design uses the ADC12DJ3200 evaluation module (EVM) to demonstrate a direct RF-sampling receiver for a radar operating in HF, VHF, UHF, L-, S-, C- and part of X-band. The wide analog-input bandwidth and high-sampling rate (6.4 GSPS) of the analog-to-digital converter (ADC) provides (...)
Design guide: PDF
Schematic: PDF
Reference designs

TIDA-01163 — Multi-band RF Sampling Receiver Reference Design

The RF sampling receiver captures signals directly in the radio frequency (RF) band. In a multi-band application the desired signals are not very wide band but they are spaced far apart within the spectrum. The reference design captures signals in different RF bands and digitally down-converts them (...)
Design guide: PDF
Schematic: PDF
Reference designs

TIDA-01016 — Clocking Reference Design for RF Sampling ADCs in Signal Analyzers and Wireless Testers

TIDA-01016 is a clocking solution for high dynamic range high speed ADC. RF input signals are directly captured using the RF sampling approach by high speed ADC. The ADC32RF45 is a dual- channel, 14-bit, 3-GSPS RF sampling ADC. The 3-dB input bandwidth is 3.2 GHz, and it captures signals up to 4 (...)
Design guide: PDF
Schematic: PDF
Reference designs

TIDA-00814 — RF-Sampling S-Band Radar Receiver Reference Design

A direct RF sampling receiver approach to a radar system operating in S-band is demonstrated using the ADC32RF45, 3-Gsps, 14-bit analog to digital converter (ADC). RF sampling reduces the complexity of a system by removing down conversion and using a high sampling rate enables wider signal (...)
Design guide: PDF
Schematic: PDF
Package Pins CAD symbols, footprints & 3D models
VQFN (RGT) 16 Ultra Librarian
VQFN (RGW) 20 Ultra Librarian

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