The TPS7A57 is a low-noise (2.45 µVRMS), ultra-low-dropout linear regulator (LDO) capable of sourcing 5 A with only 75 mV of dropout, independently of the output voltage. The device output voltage is adjustable from 0.5 V to 5.2 V using a single external resistor. The combination of low noise, high PSRR (36 dB at 1 MHz), and high output-current capability makes the TPS7A57 designed for powering noise-sensitive components (such as RF amplifiers, radar sensors, SERDES and analog chipsets) found in radar power, communication, and imaging applications.
Digital loads [such as application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), and digital signal processors (DSPs)] requiring low-input, low-output (LILO) voltage operation also benefit from the exceptional accuracy (1% over load, line, and temperature), remote sensing, excellent transient performance, and soft-start capabilities to provide optimal system performance. The versatility, performance, and small footprint solution make this LDO an excellent choice for high-current analog loads such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and imaging sensors as well as digital loads such as serializer/deserializers (SerDes), FPGAs, and DSPs.
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | TPS7A57 5-A, Low-VIN (0.7 V), Low-Noise (2.1 μVRMS), High-Accuracy (1%), Ultra-Low Dropout (LDO) Voltage Regulator datasheet | PDF | HTML | 14 Jul 2022 |
| White paper | Reduce System Noise Using Parallel LDOs | PDF | HTML | 03 Nov 2025 | |
| White paper | Measuring Output Noise for Ultra-Low Noise LDOs | PDF | HTML | 28 Oct 2025 | |
| White paper | Demystifying LDO Turn-On (startup) Time | PDF | HTML | 05 Oct 2024 | |
| Circuit design | Voltage Margining and Scaling Circuit with a Voltage Output Smart DAC (Rev. A) | PDF | HTML | 17 Apr 2024 | |
| Circuit design | Voltage Margining and Scaling Circuit With Current Output Smart DAC (Rev. A) | PDF | HTML | 16 Apr 2024 | |
| Certificate | TPS7A57EVM-081 EU RoHS Declaration of Conformity (DoC) | 09 Jan 2023 | ||
| White paper | Parallel LDO Architecture Design Using Ballast Resistors | PDF | HTML | 14 Dec 2022 | |
| White paper | Comprehensive Analysis and Universal Equations for Parallel LDO's Using Ballast | PDF | HTML | 13 Dec 2022 |
For additional terms or required resources, click any title below to view the detail page where available.
The TPS7A57 evaluation module (EVM) helps design engineers evaluate the operation and performance of the TPS7A57 linear regulator for possible use in their own circuit application. This EVM configuration contains a single low-noise, high-accuracy, linear regulator for a wide range of applications. (...)
The TPS7A57EVM-081 evaluation module (EVM) is a platform for developing the TPS7A57, which is a low-noise, low-dropout (LDO) linear regulator. The TIDA-050061 reference design showcases the TPS7A57 in a parallel configuration using ballast resistors, which is capable of sourcing 13 A.
A (...)
The parallel low-dropout (LDO) calculator is a Microsoft® Excel®-based tool that provides worst-case analysis for parallel LDO regulators using ballast resistors. The tool helps the user identify the minimum number of parallel LDO regulators required and optimum ballast resistance for a (...)
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| WQFN (RTE) | 16 | Ultra Librarian |
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Parallel LDO Calculator using ballast resistors
Initial Release