LMK03328
- Ultra-low noise, high performance
- Jitter: 100fs RMS typical, FOUT > 100MHz
- PSNR: –80dBc, robust supply noise immunity
- Flexible device options
- Up to 8 AC-LVPECL, AC-LVDS, AC-CML, HCSL or LVCMOS outputs, or any combination
- Pin mode, I2C mode, and EEPROM mode
- 71-pin selectable pre-programmed default start-up options
- Dual inputs with automatic or manual selection
- Crystal input: 10MHz to 52MHz
- External input: 1MHz to 300MHz
- Frequency margining options
- Fine frequency margining (±50ppm typical) using low-cost pullable crystal reference
- Glitchless coarse frequency margining (%) using output dividers
- Other features
- Supply: 3.3V core, 1.8V, 2.5V, 3.3V output
- Industrial temperature range (–40°C to 85°C)
- Package: 7mm × 7mm 48-WQFN
The LMK03328 device is an ultra-low-noise clock generator that has two fractional-N frequency synthesizers with integrated VCOs, flexible clock distribution and fan-out, and pin-selectable configuration states stored in an on-chip EEPROM. The device can generate multiple clocks for various multi-gigabit serial interfaces and digital devices, which can reduce the BOM cost and board area, and can improve reliability by replacing multiple oscillators and clock distribution devices. The ultra-low-jitter reduces bit error rate (BER) in high-speed serial links.
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Technical documentation
Design & development
For additional terms or required resources, click any title below to view the detail page where available.
LMK03328EVM — LMK03328EVM Ultra-Low-Jitter Clock Generator EVM With 2 PLLs, 8 Differential Outputs, and 2 Inputs
The LMK03328EVM evaluation module provides a complete clocking platform to evaluate the 100-fs RMS jitter performance and pin-/software-configuration modes and features of the Texas Instruments LMK03328 Ultra-Low-Jitter Clock Generator with Dual PLLs, 8 outputs, 2 inputs, and integrated EEPROM.
The (...)
TICSPRO-SW — TICS Pro GUI and Live Programming Tool for Clocking Devices
Texas Instruments clocks and synthesizers (TICS) pro software is used to program the evaluation modules (EVMs) for product numbers with these prefixes: CDC, LMK and LMX. These products include phase-locked loops and voltage-controlled oscillators (PLL+VCO), synthesizers and clocking devices.
Supported products & hardware
Products
Clock generators
RF PLLs & synthesizers
Clock buffers
Oscillators
Clock jitter cleaners
Clock network synchronizers
Hardware development
Evaluation board
Software
IDE, configuration, compiler or debugger
CLOCK-TREE-ARCHITECT — Clock tree architect programming software
PLLATINUMSIM-SW — PLLatinum Sim Tool
PLLATINUMSIM-SW is a simulation tool that allows users to create detailed designs and simulations of our PLLatinum™ integrated circuits, which include the LMX series of phase-locked loops (PLLs) and synthesizers.
Supported products & hardware
Products
RF PLLs & synthesizers
Clock buffers
Clock generators
IQ demodulators
Clock jitter cleaners
Clock network synchronizers
Hardware development
Evaluation board
Software
Application software & framework
IDE, configuration, compiler or debugger
Support software
PSPICE-FOR-TI — PSpice® for TI design and simulation tool
Package | Pins | CAD symbols, footprints & 3D models |
---|---|---|
WQFN (RHS) | 48 | Ultra Librarian |
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