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UCC27301A

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具有 8V UVLO、使能和互锁功能的 120V、4A 半桥驱动器

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UCC27301A

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产品详情

Bootstrap supply voltage (max) (V) 120 Power switch MOSFET Input supply voltage (min) (V) 8 Input supply voltage (max) (V) 17 Peak output current (A) 4 Operating temperature range (°C) -40 to 150 Undervoltage lockout (typ) (V) 8 Rating Catalog Propagation delay time (µs) 0.02 Rise time (ns) 7.2 Fall time (ns) 5.5 Iq (mA) 0.001 Input threshold TTL Channel input logic TTL Switch node voltage (V) -20 Features Negative voltage handling Driver configuration Dual, Noninverting, TTL compatible
Bootstrap supply voltage (max) (V) 120 Power switch MOSFET Input supply voltage (min) (V) 8 Input supply voltage (max) (V) 17 Peak output current (A) 4 Operating temperature range (°C) -40 to 150 Undervoltage lockout (typ) (V) 8 Rating Catalog Propagation delay time (µs) 0.02 Rise time (ns) 7.2 Fall time (ns) 5.5 Iq (mA) 0.001 Input threshold TTL Channel input logic TTL Switch node voltage (V) -20 Features Negative voltage handling Driver configuration Dual, Noninverting, TTL compatible
SOIC (D) 8 29.4 mm² 4.9 x 6 VSON (DRC) 10 9 mm² 3 x 3
  • Drives two N-channel MOSFETs in half-bridge configuration
  • –40°C to +150°C junction temperature range
  • 120V abs max voltage on HB pin
  • 3.7A sink, 4.5A source output currents
  • 8V to 17V VDD operating range (20V abs max) with UVLO
  • –(28–VDD)V abs max negative transient tolerance on HS pin (<100ns pulse)
  • –10V to +20V abs max input pins tolerance, independent of supply voltage range (TTL compatible)
  • Switching parameters:
    • 20ns typical propagation delay times
    • 7.2ns rise and 5.5ns fall time with 1000pF load
    • 4ns typical delay matching
  • Integrated bootstrap diode
  • Input interlock
  • Enable/disable functionality with low current consumption (3µA typical) when disabled (DRC package only)
  • Drives two N-channel MOSFETs in half-bridge configuration
  • –40°C to +150°C junction temperature range
  • 120V abs max voltage on HB pin
  • 3.7A sink, 4.5A source output currents
  • 8V to 17V VDD operating range (20V abs max) with UVLO
  • –(28–VDD)V abs max negative transient tolerance on HS pin (<100ns pulse)
  • –10V to +20V abs max input pins tolerance, independent of supply voltage range (TTL compatible)
  • Switching parameters:
    • 20ns typical propagation delay times
    • 7.2ns rise and 5.5ns fall time with 1000pF load
    • 4ns typical delay matching
  • Integrated bootstrap diode
  • Input interlock
  • Enable/disable functionality with low current consumption (3µA typical) when disabled (DRC package only)

The UCC27301A is a robust gate driver designed to drive two N-channel MOSFETs in a half-bridge or synchronous buck configuration with an absolute maximum bootstrap voltage of 120V. Its 3.7A peak source and 4.5A peak sink current capability allows the UCC27301A to drive large power MOSFETs with minimized switching losses during the transition through the Miller Plateau. The switching node (HS pin) can handle negative transient voltage, which allows the high-side channel to be protected from inherent negative voltages caused by parasitic inductance and stray capacitance.

The inputs are independent of supply voltage and are able to withstand -10V and +20V absolute maximum ratings. The low-side and high-side gate drivers are matched to 4ns between the turn on and turn off of each other and are controlled throught the LI and HI input pins respectively. However, the input interlock logic will turn both driver outputs low whenever both LI and HI inputs are high at the same time. An on-chip 120V rated bootstrap diode eliminates the need to add discrete bootstrap diodes. Undervoltage lockout (UVLO) is provided for both the high-side and the low-side drivers which provides symmetric turn on and turn off behavior and forces the outputs low if the drive voltage is below the specified threshold.

The UCC27301A is a robust gate driver designed to drive two N-channel MOSFETs in a half-bridge or synchronous buck configuration with an absolute maximum bootstrap voltage of 120V. Its 3.7A peak source and 4.5A peak sink current capability allows the UCC27301A to drive large power MOSFETs with minimized switching losses during the transition through the Miller Plateau. The switching node (HS pin) can handle negative transient voltage, which allows the high-side channel to be protected from inherent negative voltages caused by parasitic inductance and stray capacitance.

The inputs are independent of supply voltage and are able to withstand -10V and +20V absolute maximum ratings. The low-side and high-side gate drivers are matched to 4ns between the turn on and turn off of each other and are controlled throught the LI and HI input pins respectively. However, the input interlock logic will turn both driver outputs low whenever both LI and HI inputs are high at the same time. An on-chip 120V rated bootstrap diode eliminates the need to add discrete bootstrap diodes. Undervoltage lockout (UVLO) is provided for both the high-side and the low-side drivers which provides symmetric turn on and turn off behavior and forces the outputs low if the drive voltage is below the specified threshold.
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* 数据表 UCC27301A 120V, 3.7A/4.5A Half-Bridge Driver with 8V UVLO, Interlock and Enable 数据表 PDF | HTML 2024年 7月 22日
应用手册 如何为直流电机驱动器选择栅极驱动器 PDF | HTML 英语版 PDF | HTML 2023年 10月 6日

设计和开发

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评估板

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UCC27282EVM-335 适用于评估 UCC27282DRC，后者是一种具备高峰值拉电流和灌电流能力的 120V 半桥栅极驱动器。此 EVM 可用于参照驱动器 IC 的数据表对其进行评估。该 EVM 还可用作驱动器 IC 组件选择指南。此 EVM 可用于确定 PCB 布局对栅极驱动器性能的影响。
用户指南: PDF
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评估板

UCC27288EVM — UCC27288 100V、3A、8V UVLO 半桥栅极驱动器评估模块

UCC27288EVM 适用于评估 UCC27288D，后者是一款具备 2.5A 峰值拉电流和 3.5A 峰值灌电流能力的 100V 半桥栅极驱动器。此 EVM 可用作驱动功率 MOSFET 的参考设计，驱动电压高达 20V。
用户指南: PDF
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