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LMX2615-SP

ACTIVE

Space grade 40-MHz to 15-GHz wideband synthesizer with phase synchronization and JESD204B support

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Data sheet

LMX2615-SP

ACTIVE
Data sheet Order now

Product details

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CFP (HBD) 64 400 mm² 20 x 20
  • Radiation specifications:
  • 40MHz to 15.2GHz output frequency
  • –110dBc/Hz phase noise at 100kHz offset with 15GHz carrier
  • 45fs RMS jitter at 8GHz (100Hz to 100MHz)
  • Programmable output power
  • PLL key specifications:
    • Figure of merit: –236dBc/Hz
    • Normalized 1/f noise: –129dBc/Hz
    • Up to 200MHz phase detector frequency
  • Synchronization of output phase across multiple devices
  • Support for SYSREF with programmable delay
  • 3.3V single power supply operation
  • 71 pre-selected pin modes
  • 11 × 11mm² 64-lead CQFP ceramic package
  • Operating temperature range: –55°C to +125°C
  • Radiation specifications:
  • 40MHz to 15.2GHz output frequency
  • –110dBc/Hz phase noise at 100kHz offset with 15GHz carrier
  • 45fs RMS jitter at 8GHz (100Hz to 100MHz)
  • Programmable output power
  • PLL key specifications:
    • Figure of merit: –236dBc/Hz
    • Normalized 1/f noise: –129dBc/Hz
    • Up to 200MHz phase detector frequency
  • Synchronization of output phase across multiple devices
  • Support for SYSREF with programmable delay
  • 3.3V single power supply operation
  • 71 pre-selected pin modes
  • 11 × 11mm² 64-lead CQFP ceramic package
  • Operating temperature range: –55°C to +125°C

The LMX2615-SP is a high performance wideband phase-locked loop (PLL) with integrated voltage controlled oscillator (VCO) and voltage regulators that can output any frequency from 40MHz and 15.2GHz without a doubler, which eliminates the need for ½ harmonic filters. The VCO on this device covers an entire octave so the frequency coverage is complete down to 40MHz. The high performance PLL with a figure of merit of –236dBc/Hz and high phase detector frequency can attain very low in-band noise and integrated jitter.

The LMX2615-SP allows users to synchronize the output of multiple instances of the device. This means that deterministic phase can be obtained from a device in any use case including the one with fractional engine or output divider enabled. The device also adds support for either generating or repeating SYSREF (compliant to JESD204B standard), making the device designed low-noise clock source for high-speed data converters.

The LMX2615-SP is a high performance wideband phase-locked loop (PLL) with integrated voltage controlled oscillator (VCO) and voltage regulators that can output any frequency from 40MHz and 15.2GHz without a doubler, which eliminates the need for ½ harmonic filters. The VCO on this device covers an entire octave so the frequency coverage is complete down to 40MHz. The high performance PLL with a figure of merit of –236dBc/Hz and high phase detector frequency can attain very low in-band noise and integrated jitter.

The LMX2615-SP allows users to synchronize the output of multiple instances of the device. This means that deterministic phase can be obtained from a device in any use case including the one with fractional engine or output divider enabled. The device also adds support for either generating or repeating SYSREF (compliant to JESD204B standard), making the device designed low-noise clock source for high-speed data converters.
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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet LMX2615-SP Space Grade 40MHz to 15GHz Wideband Synthesizer With Phase Synchronization and JESD204B Support datasheet (Rev. E) PDF | HTML 11 Dec 2025
* SMD LMX2615-SP SMD 5962-17236 19 May 2020
* Radiation & reliability report LMX2615-SP Enhanced Low Dose Rate Sensitivity (ELDRS) Characterization Radiation 30 Aug 2019
* Radiation & reliability report Single Event Effect Report: LMX2615-SP 40MHz to 15 GHz Wideband Synthesizer 30 Aug 2019
Selection guide TI Space Products (Rev. L) 27 Mar 2026
Application brief Allan Deviation Measurement Data from LMX2615 26 Jun 2025
Application brief DLA Approved Optimizations for QML Products (Rev. C) PDF | HTML 17 Jun 2025
Application note Heavy Ion Orbital Environment Single-Event Effects Estimations (Rev. B) PDF | HTML 10 Jun 2025
Application note Practical Clocking Considerations That Give Your Next High-Speed Converter Design an Edge (Rev. A) PDF | HTML 11 Apr 2025
More literature TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing (Rev. B) 20 Feb 2025
Application brief Compilation of RF Synthesizer Resources PDF | HTML 22 Oct 2024
Circuit design MASH_SEED Optimization and Impact on Spurs (LMX2820) PDF | HTML 08 Aug 2024
Certificate LMX2615EVM-CVAL EU Declaration of Conformity (DoC) 20 Sep 2023
Application note Single-Event Effects Confidence Interval Calculations (Rev. A) PDF | HTML 19 Oct 2022
Application note Streamline RF Synthesizer VCO Calibration and Optimize PLL Lock Time (Rev. A) 27 Aug 2021
Technical article Why component integration carries weight for space-based PLL synthesizers PDF | HTML 10 Feb 2020
E-book Radiation Handbook for Electronics (Rev. A) 21 May 2019

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

LMX2615EVM-CVAL — Space grade synthesizer evaluation module

The LMX2615EVM-CVAL evaluation module (EVM) is designed for evaluating the LMX2615-SP product. It includes the assembled PCB and uses Reference Pro to program the board and also provide a 100-MHz input reference. The board is assembled with the LMX2615W-MPR engineering sample and can be used to (...)
User guide: PDF | HTML
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Simulation model

LMX2615 IBIS Model

SNAM229.ZIP (45 KB) - IBIS Model
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Design tool

CLOCK-TREE-ARCHITECT — Clock tree architect programming software

Clock tree architect is a clock tree synthesis tool that streamlines your design process by generating clock tree solutions based on your system requirements. The tool pulls data from an extensive database of clocking products to generate a system-level multi-chip clocking solution.
Design now
Design tool

PLLATINUMSIM-SW — PLL loop filter, phase noise, lock time, and spur simulation tool

PLLATINUMSIM-SW is a simulation tool that allows users to create detailed designs and simulations of our PLLatinum™ integrated circuits, which include the LMX series of phase-locked loops (PLLs) and synthesizers.

Supported products & hardware

Supported products & hardware
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Reference designs

TIDA-010191 — Space-grade multichannel JESD204B 15-GHz clocking reference design

Phased-array antennas and digital beamforming are key technologies that will boost the performance of future spaceborne radar imaging and broadband satellite communication systems. Digital beamforming, unlike analog beamforming, typically requires a set of data converters per antenna element. (...)
Design guide: PDF
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CFP (HBD) 64 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

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