CDCE6214-Q1EVM
CDCE6214-Q1EVM
CDCE6214-Q1EVM
概述
The CDCE6214-Q1 evalution module (EVM) is an evaluation platform for the CDCE6214-Q1 ultra-low power clock generator. This
evaluation module provides an USB-based interface to access the I2C bus to communicate with the CDCE6214-Q1. Pin control mode can set the device in a specific operation mode.
特性
- Easy to use the EVM to generate up to 4 differential outputs and 1 LVCMOS output with on board XTAL or an external reference clock
- Accept differential or single-ended clock and XTAL input
- Device control pins configurable through jumpers
- Power from USB (default) or external +5 V, using on board LDOs 1.8 V (default) and 3.3 V
时钟发生器
开始使用
- Order the CDCE6214-Q1EVM
- Download and install TICSPRO-SW
- Read the CDCE6214-Q1EVM user’s guide
- Configure registers on TICSRPRO-SW
立即订购并开发
评估板
CDCE6214-Q1EVM — CDCE6214-Q1EVM
TI.com 上无现货
TICSPRO-SW — TICS Pro GUI and Live Programming Tool for Clocking Devices
版本: 1.7.7.6
发布日期: 29 十月 2024
TICS Pro 1.7.7.6 installer binary for Windows operating system
产品
时钟发生器
射频 PLL 与合成器
时钟缓冲器
振荡器
时钟抖动清除器
时钟网络同步器
硬件开发
评估板
文档
TICS Pro 1.7.7.6 Release Notes
TICS Pro 1.7.7.6 Software Manifest
发布信息
Added Features
LMK5Bxxyyy, LMK5Cxxyyy
- Warnings and errors improved, particularly corrective suggestions
- REFx_FREQ=0 automatically disables DPLL reference input selection for that input
- Input validation enabled and disabled by start page settings, including 1PPS
- APLL reference selection moved to Step 5, just before clock output definition
- Quick-set multiple outputs to the same settings on frequency planner
- BAW VCO allows some ppm deviation
- Force SYSREF option on OUT0/1
- Expose DPLLx_LCK_TIMER field
- Match LMK05318B EEPROM page design
- .EPR export option
- EEPROM SRAM programming generation support
- For complete changelist, see release notes
LMK3H0102
- Configuration search tool
- Wizard: voltage selection option
Bug Fixes
- LMK04832-SP, LMK04832-SEP, LMK04714-Q1, LMK04368-EP - PD_FIN0 corrected to FIN0_PD
- LMK3H0102 - Several wizard bugfixes
Known Issues
- LMK5C33216 - When cascading from VCO3 to DPLL input, the divide value must manually be entered into DPLLx_REF5_RDIV as ( VCO3 output frequency / DPLLx TDC frequency )
- LMK05318 - In some cases, it is necessary to press "Calculate Frequency Plan" twice for correct VCO2 frequency. This issue is resolved in LMK05318B GUI.
- Burst mode page looping requires long delays to halt, and halting may crash the GUI. If possible, do not loop in burst mode.
- User Controls page can sometimes become desynchronized from Raw Registers and other pages. Refer to Raw Registers or other pages for correct values. Saving/Loading and Import/Export of register data is unaffected, and register data will still be written to and read from connected devices correctly.
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类型 | 标题 | 下载最新的英文版本 | 日期 | |||
---|---|---|---|---|---|---|
* | EVM 用户指南 | CDCE6214-Q1 EVM User's Guide (Rev. A) | 2019年 11月 27日 | |||
证书 | CDCE6214-Q1EVM Declaration of Conformity (DoC) | 2020年 4月 28日 |