LMX2571EPEVM
LMX2571-EP 1.34GHz 低功耗极端温度 RF 合成器评估模块
LMX2571EPEVM
概述
LMX2571-EP 评估模块 (EVM) 是一款适用于开发低功耗、高性能 RF 合成器 LMX2571-EP 的平台,该合成器可生成 10MHz 至 1344MHz 的频率,工作温度范围为 -55°C 至 125°C。
特性
- 外部电压控制振荡器 (VCO) 选项
- 输出通道分频器支持的运行频率范围为 10MHz 至 1400MHz
- 直接数字移频键控 (FSK) 调制
- 工作温度范围为 –55°C 至 125°C
开始使用
- 订购 LMX2571EPEVM
- 下载并安装 TICSPRO-SW 和 PLLATINUMSIM-SW
- 阅读 LMX2571EPEVM 用户指南
- 在 TICSPRO-SW 上配置寄存器并在 PLLATINUMSIM-SW 上仿真性能
立即订购并开发
LMX2571EPEVM — LMX2571-EP evaluation module for 1.34-GHz, low-power, extreme-temperature RF synthesizer
PLLATINUMSIM-SW — PLLatinum Sim Tool
产品
时钟缓冲器
时钟发生器
时钟抖动清除器
Oscillators
硬件开发
评估板
发布信息
Bug fixes
最新信息
- Added LMK6H/D/C/P family of oscillators
- Added LMK61 oscillator
- Added LMK3H oscillator
- Added LMX1205
TICSPRO-SW — TICS Pro GUI and Live Programming Tool for Clocking Devices
TICS Pro 1.7.7.9 installer binary for Windows operating system
产品
时钟发生器
时钟缓冲器
Oscillators
时钟抖动清除器
时钟网络同步器
射频 PLL 与合成器
硬件开发
评估板
文档
TICS Pro 1.7.7.9 Release Notes
TICS Pro 1.7.7.9 Software Manifest
发布信息
NOTE: v1.7.7.8 was withdrawn due to the installer being built with an older version of several profiles. v1.7.7.9 includes the correct files, and is otherwise identical to v1.7.7.8.
Bug Fixes
- Start Page: dimming improvements for unused input references, force FB config 1 only and require manual copying for FB config 2
- Validation Page: DPLL LOFL validation registers for FB2 are programmed for cases where FB2 is used
- ZDM Page: Added relative time calculations for DPLLx_PH_OFFSET
- Programming Page: Added DPLL loop filter register generator, clearly indicate ROM-only registers for post-EEPROM boot sequence
- LMK5B12212 will now calculate loop filter values
- LMK5B12212 and LMK5C12212A "Read Status" and "Read RO Regs" buttons fixed
- LMK5B12212 and LMK5C12212A corrected PLL1 VCO post-divider frequency on OUT0&1, OUT2&3 pages
- Improved accuracy of frequency error warnings
- Frequency Planner: OUT0/OUT1 CMOS and LDO voltage are now correctly set, REFx for OUT0 or OUT1 is now correctly set
- ZDM configuration now fails more gracefully for unsupported non-integer input/output attempts
Known Issues
- NEW: LMK5B and LMK5C family - In some cases, "Assign Selected VCO Settings to Device" and "Apply Output Clock Settings to Device" may need to be pressed twice for certain cascaded configurations to display correctly
- LMK5C33216 - When cascading from VCO3 to DPLL input, the divide value must manually be entered into DPLLx_REF5_RDIV as ( VCO3 output frequency / DPLLx TDC frequency )
- LMK05318 - In some cases, it is necessary to press "Calculate Frequency Plan" twice for correct VCO2 frequency. This issue is resolved in LMK05318B GUI.
- Burst mode page looping requires long delays to halt, and halting may crash the GUI. If possible, do not loop in burst mode.
- User Controls page can sometimes become desynchronized from Raw Registers and other pages. Refer to Raw Registers or other pages for correct values. Saving/Loading and Import/Export of register data is unaffected, and register data will still be written to and read from connected devices correctly.
设计文件
技术文档
类型 | 标题 | 下载最新的英文版本 | 日期 | |||
---|---|---|---|---|---|---|
EVM 用户指南 | LMX2571EPEVM 评估说明 (Rev. A) | PDF | HTML | 英语版 (Rev.A) | PDF | HTML | 2022年 7月 8日 | |
证书 | LMX2571EPEVM EU Declaration of Conformity (DoC) | 2021年 3月 9日 |