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Analog-to-digital converters (ADCs)
High-speed ADCs (≥10 MSPS)

ADC3662

ACTIVE

Dual-channel, 16-bit, 25-MSPS, low-noise, ultra-low-power, low-latency ADC

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Data sheet

ADC3662

ACTIVE
Data sheet Order now

Product details

Sample rate (max) (Msps) 25 Resolution (Bits) 16 Number of input channels 2 Interface type Serial LVDS Analog input BW (MHz) 900 Features High Dynamic Range, High Performance, Low Power, Ultra High Speed Rating Catalog Peak-to-peak input voltage range (V) 3.2 Power consumption (typ) (mW) 110 Architecture SAR SNR (dB) 82 ENOB (Bits) 13.3 SFDR (dB) 90 Operating temperature range (°C) -40 to 105 Input buffer No
Sample rate (max) (Msps) 25 Resolution (Bits) 16 Number of input channels 2 Interface type Serial LVDS Analog input BW (MHz) 900 Features High Dynamic Range, High Performance, Low Power, Ultra High Speed Rating Catalog Peak-to-peak input voltage range (V) 3.2 Power consumption (typ) (mW) 110 Architecture SAR SNR (dB) 82 ENOB (Bits) 13.3 SFDR (dB) 90 Operating temperature range (°C) -40 to 105 Input buffer No
WQFN (RSB) 40 25 mm² 5 x 5
  • 16-Bit 10-MSPS, 25-MSPS, or 65-MSPS ADCs
  • Noise floor: –158 dBFS/Hz
  • Low power consumption: 53 mW/ch (10 MSPS) to 94 mW/ch (65 MSPS)
  • Latency: 1 cycle (1-wire SLVDS)
  • Specified 16-bit, no missing codes
  • INL: ± 3 LSB; DNL: ± 0.7 LSB
  • Reference: external or internal
  • Input bandwidth: 900 MHz (3 dB)
  • Industrial temperature range: –40°C to +105°C
  • On-chip digital filter (optional)
    • Decimation by 2, 4, 8, 16, 32
    • 32-bit NCO
  • Serial LVDS digital interface (2-, 1- and 1/2-wire)
  • Small footprint: 40-WQFN (5 mm × 5 mm) package
  • Spectral performance (fIN = 10 MHz):
    • SNR: 81.9 dBFS
    • SFDR: 92-dBc HD2, HD3
    • SFDR: 99-dBFS worst spur
  • 16-Bit 10-MSPS, 25-MSPS, or 65-MSPS ADCs
  • Noise floor: –158 dBFS/Hz
  • Low power consumption: 53 mW/ch (10 MSPS) to 94 mW/ch (65 MSPS)
  • Latency: 1 cycle (1-wire SLVDS)
  • Specified 16-bit, no missing codes
  • INL: ± 3 LSB; DNL: ± 0.7 LSB
  • Reference: external or internal
  • Input bandwidth: 900 MHz (3 dB)
  • Industrial temperature range: –40°C to +105°C
  • On-chip digital filter (optional)
    • Decimation by 2, 4, 8, 16, 32
    • 32-bit NCO
  • Serial LVDS digital interface (2-, 1- and 1/2-wire)
  • Small footprint: 40-WQFN (5 mm × 5 mm) package
  • Spectral performance (fIN = 10 MHz):
    • SNR: 81.9 dBFS
    • SFDR: 92-dBc HD2, HD3
    • SFDR: 99-dBFS worst spur

The ADC3661, ADC3662, and ADC3663 (ADC366x) family of devices are low-noise, ultra-low power, 16-bit, 10-MSPS to 65-MSPS, high-speed, dual-channel, analog-to-digital converters (ADCs). Designed for low noise performance, these devices deliver a noise spectral density of –158 dBFS/Hz combined with great linearity and dynamic range. The ADC366x offers good dc precision together with IF sampling support making these devices suitable for a wide range of applications. High-speed control loops benefit from the short latency as low as only 1 clock cycle. The ADC consumes only 94 mW/ch at 65 MSPS and power consumption that scales well with lower sampling rates.

The ADC366x uses a serial LVDS (SLVDS) interface to output the data. The devices support a two-lane, a one-lane and a half-lane option. These devices are a pin-to-pin compatible family with 16-bit and 18-bit resolution and different speed grades. The devices come in a 40-pint QFN package (5 x 5 mm), and supports the extended industrial temperature range of –40°C to +105⁰C.

The ADC3661, ADC3662, and ADC3663 (ADC366x) family of devices are low-noise, ultra-low power, 16-bit, 10-MSPS to 65-MSPS, high-speed, dual-channel, analog-to-digital converters (ADCs). Designed for low noise performance, these devices deliver a noise spectral density of –158 dBFS/Hz combined with great linearity and dynamic range. The ADC366x offers good dc precision together with IF sampling support making these devices suitable for a wide range of applications. High-speed control loops benefit from the short latency as low as only 1 clock cycle. The ADC consumes only 94 mW/ch at 65 MSPS and power consumption that scales well with lower sampling rates.

The ADC366x uses a serial LVDS (SLVDS) interface to output the data. The devices support a two-lane, a one-lane and a half-lane option. These devices are a pin-to-pin compatible family with 16-bit and 18-bit resolution and different speed grades. The devices come in a 40-pint QFN package (5 x 5 mm), and supports the extended industrial temperature range of –40°C to +105⁰C.
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Our ADC3660 family won the 2021 World Electronics Achievement Awards (WEAA) Product of the Year in the Amplifier/Data Conversion category.

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Technical documentation

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* Data sheet ADC366x 16-Bit, 0.5-MSPS to 65-MSPS, Low-Noise, Low Power, Dual-Channel ADC datasheet (Rev. B) PDF | HTML 27 Sep 2022
Application note Practical Clocking Considerations That Give Your Next High-Speed Converter Design an Edge (Rev. A) PDF | HTML 11 Apr 2025
Analog Design Journal How to simplify AFE filtering via high‐speed ADCs with internal digital filters 10 Jan 2020

Design & development

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Evaluation board

ADC3662EVM — ADC3662 evaluation module for dual-channel, 16-bit, 25-MSPS, low-noise, ultra-low-power ADC

The ADC3662 evaluation module (EVM) is designed to evaluate the ADC3662 family of high-speed analog-to-digital converters (ADCs). The EVM is populated with the ADC3662, a 16-bit, dual-channel 25MSPS ADC with serial LVDS interface and allows for evaluation of up to 25MSPS and single or dual channel (...)
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GUI for evaluation module (EVM)

DATACONVERTERPRO-SW — High Speed Data Converter Pro GUI Installer, v5.31

This high-speed data converter pro GUI is a PC (Windows® XP/7/10 compatible) program designed to aid in evaluation of most TI high-speed data converter [analog-to-digital converter (ADC) and digital-to-analog converter (DAC)] and analog front-end (AFE) platforms. Designed to support the entire (...)

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Simulation model

ADC35xx TINA-TI Reference Design

SBAM455.ZIP (158 KB) - TINA-TI Reference Design
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Simulation model

Example Electrosurgery Reference Design

SLOM512.ZIP (58 KB) - PSpice Model
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Design tool

ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
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PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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