Product details

Resolution (Bits) 20 Sample rate (max) (ksps) 1000 Number of input channels 1 Interface type Enhanced SPI, SPI Architecture SAR Input type Differential Rating Catalog Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 21 Analog supply voltage (min) (V) 3 Analog supply voltage (max) (V) 5.5 SNR (dB) 104.5 Digital supply (min) (V) 1.65 Digital supply (max) (V) 5.5
Resolution (Bits) 20 Sample rate (max) (ksps) 1000 Number of input channels 1 Interface type Enhanced SPI, SPI Architecture SAR Input type Differential Rating Catalog Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 21 Analog supply voltage (min) (V) 3 Analog supply voltage (max) (V) 5.5 SNR (dB) 104.5 Digital supply (min) (V) 1.65 Digital supply (max) (V) 5.5
VQFN (RGE) 24 16 mm² 4 x 4
  • Resolution: 20-Bits
  • High Sample Rate With No Latency Output:
    • ADS8900B: 1-MSPS
    • ADS8902B: 500-kSPS
    • ADS8904B: 250-kSPS
  • Integrated LDO Enables Low-Power, Single-Supply Operation
  • Low Power Reference Buffer with No Droop
  • Excellent AC and DC Performance:
    • SNR: 104.5-dB, THD: –125-dB
    • DNL: ±0.2-ppm, 20-Bit No-Missing-Codes
    • INL: ±1-ppm
  • Wide Input Range:
    • Unipolar Differential Input Range: ±VREF
    • VREF Input Range: 2.5-V to 5-V
  • Enhanced-SPI Digital Interface
    • Interface SCLK : 22-MHz at 1-MSPS.
    • Configurable Data Parity Output.
  • Extended Temperature Range: –40°C to +125°C
  • Small Footprint: 4-mm × 4-mm VQFN
  • Resolution: 20-Bits
  • High Sample Rate With No Latency Output:
    • ADS8900B: 1-MSPS
    • ADS8902B: 500-kSPS
    • ADS8904B: 250-kSPS
  • Integrated LDO Enables Low-Power, Single-Supply Operation
  • Low Power Reference Buffer with No Droop
  • Excellent AC and DC Performance:
    • SNR: 104.5-dB, THD: –125-dB
    • DNL: ±0.2-ppm, 20-Bit No-Missing-Codes
    • INL: ±1-ppm
  • Wide Input Range:
    • Unipolar Differential Input Range: ±VREF
    • VREF Input Range: 2.5-V to 5-V
  • Enhanced-SPI Digital Interface
    • Interface SCLK : 22-MHz at 1-MSPS.
    • Configurable Data Parity Output.
  • Extended Temperature Range: –40°C to +125°C
  • Small Footprint: 4-mm × 4-mm VQFN

The ADS8900B, ADS8902B, and ADS8904B (ADS890xB) belong to a family of pin-to-pin compatible, high-speed, single-channel, high-precision, 20-bit successive-approximation-register (SAR) analog-to-digital converters (ADCs) with an integrated reference buffer and integrated low-dropout regulator (LDO). The device family includes the ADS891xB (18-bit) and ADS892xB (16-bit) resolution variants.

The ADS89xxB boosts analog performance while maintaining high-resolution data transfer by using TI’s Enhanced-SPI feature. Enhanced-SPI enables ADS89xxB in achieving high throughput at lower clock speeds, there by simplifying the board layout and lowering system cost. Enhanced-SPI also simplifies the host’s clocking-in of data there by making it ideal for applications involving FPGAs, DSPs. ADS89xxB is compatible with standard SPI Interface.

The ADS89xxB has an internal data parity feature which can be appended to the ADC data output. ADC data validation by the host, using parity bits, improves system reliability.

The ADS8900B, ADS8902B, and ADS8904B (ADS890xB) belong to a family of pin-to-pin compatible, high-speed, single-channel, high-precision, 20-bit successive-approximation-register (SAR) analog-to-digital converters (ADCs) with an integrated reference buffer and integrated low-dropout regulator (LDO). The device family includes the ADS891xB (18-bit) and ADS892xB (16-bit) resolution variants.

The ADS89xxB boosts analog performance while maintaining high-resolution data transfer by using TI’s Enhanced-SPI feature. Enhanced-SPI enables ADS89xxB in achieving high throughput at lower clock speeds, there by simplifying the board layout and lowering system cost. Enhanced-SPI also simplifies the host’s clocking-in of data there by making it ideal for applications involving FPGAs, DSPs. ADS89xxB is compatible with standard SPI Interface.

The ADS89xxB has an internal data parity feature which can be appended to the ADC data output. ADC data validation by the host, using parity bits, improves system reliability.

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Technical documentation

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* Data sheet ADS890xB 20-Bit, High-Speed SAR ADCs With Integrated Reference Buffer, and Enhanced Performance Features datasheet (Rev. A) PDF | HTML 29 Jun 2017
Analog Design Journal Analog Design Journal: Issue 3 2024 21 Oct 2024
Circuit design Powering a dual-supply op amp circuit with one LDO (Rev. B) PDF | HTML 24 Sep 2024
Circuit design High-current battery monitor circuit: 0–10A, 0-10kHz, 18 bit (Rev. A) PDF | HTML 12 Sep 2024
Circuit design High-voltage battery monitor circuit: ±20V, 0–10kHz, 18-bit fully differential (Rev. B) PDF | HTML 11 Sep 2024
Analog Design Journal Impact of voltage reference noise on ADC ENOB and noise-free resolution PDF | HTML 10 Jun 2024
Analog Design Journal ADC ENOB 및 잡음 없는 해상도에 전압 레퍼런스 잡음이 미치는 영향 PDF | HTML 24 May 2024
Analog Design Journal 電壓參考雜訊對 ADC ENOB 及無雜訊解 析度的影響 PDF | HTML 24 May 2024
Application note Continuous Wave Doppler Signal Chain Designs for TI’s Ultrasound AFE (Rev. A) PDF | HTML 22 May 2024
Application note Attenuator Amplifier Design to Maximize the Input Voltage of Differential ADCs 14 Jun 2018
Technical article Take your ultrasound design to the next level PDF | HTML 08 Feb 2018
Application brief Improving Input Settling for Precision Data Converters 12 Dec 2017
Application brief Optimizing Data Transfer on High-Resolution, High-Throughput Data Converters 12 Dec 2017
Application brief Simplify Isolation Designs Using an Enhanced-SPI ADC Interface 11 Dec 2017
Technical article Powering up the performance of sensitive test and measurement systems PDF | HTML 17 Oct 2017
Application brief Dual Bipolar Power-Supply Considerations for Amplifiers 01 Aug 2017
Application note Improving Resolution of SAR ADC 14 Jun 2017
White paper Enabling Faster, Smarter, and More Robust Solutions for SAR ADSx With multiSPI 08 Nov 2016

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

ADS8900BEVM-PDK — ADS8900B Fully-Differential Input, 20-Bit SAR ADC EVM Performance Demonstration Kit (PDK)

The ADS8900B evaluation module (EVM) performance demonstration kit (PDK) is a platform for evaluating the performance of the ADS8900B successive-approximation register (SAR) analog-to-digital converter (ADC), which is a fully-differential input, 20-bit, 1-MSPS device. (...)

User guide: PDF | HTML
Not available on TI.com
Evaluation board

PSIEVM — Precision signal injector (PSI) evaluation module for testing ADC performance

The precision signal injector (PSI) is a platform for evaluating the performance of successive-approximation register (SAR) analog-to-digital converters (ADCs). The board provides a low-distortion, low-noise, 2-kHz input signal for driving the input of the ADC, and pairs with most of the (...)

User guide: PDF
Not available on TI.com
GUI for evaluation module (EVM)

SBAC170 Precision Signal Injector (PSI) GUI Installer

Supported products & hardware

Supported products & hardware

Support software

TIDCDA6 ADS8900B IQ CAP EVM

Supported products & hardware

Supported products & hardware

Simulation model

ADS8900B PSpice Model

SBAM481.ZIP (5013 KB) - PSpice Model
Simulation model

ADS8900B TINA-TI Reference Design

SBAM303.ZIP (91 KB) - TINA-TI Reference Design
Simulation model

ADS8900B TINA-TI Transient Spice Model

SBAM302.ZIP (13 KB) - TINA-TI Spice Model
Simulation model

ADS890XB IBIS Model (Rev. A)

SBAM305A.ZIP (16 KB) - IBIS Model
Calculation tool

ANALOG-ENGINEER-CALC PC software analog engineer's calculator

The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)

Supported products & hardware

Supported products & hardware

Design tool

ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
Supported products & hardware

Supported products & hardware

Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
User guide: PDF
Reference designs

TIDA-01056 — 20-bit 1MSPS DAQ Reference Design Optimizing Power Supply Efficiency While Minimizing EMI

This reference design for high performance data acquisition (DAQ) systems optimizes power stage in order to reduce power consumption and minimize the effect of EMI from switching regulator by using LMS3635-Q1 buck converter.  This reference designs yields 7.2% efficiency improvement at most (...)
Design guide: PDF
Schematic: PDF
Reference designs

TIDA-01054 — Multi-Rail Power Reference Design for Eliminating EMI Effects in High Performance DAQ Systems

The TIDA-01054 reference design helps eliminate the performance degrading effects of EMI on Data Acquisition (DAQ) systems greater than 16 bits with the help of the LM53635 buck converter. The buck converter enables the designer to place power solutions close to the signal path without the (...)
Design guide: PDF
Schematic: PDF
Reference designs

TIDA-01351 — High-Resolution, High-SNR True Raw Data Conversion Reference Design for Ultrasound CW Doppler

This reference design is a continuous wave (CW) signal conditioning for ultrasound imaging systems (64-, 128-, 192-, 256-channel ultrasound system). This design features 20-bit fully differential simultaneous sampling with true raw data available for processing. It consists of a (...)
Design guide: PDF
Schematic: PDF
Reference designs

TIDA-01057 — Reference Design Maximizing Signal Dynamic Range for True 10 Vpp Differential Input to 20 bit ADC

This reference design is designed for high performance data acquisition(DAQ) systems to improve the dynamic range of 20 bit differential input ADCs. Many DAQ systems require the measurement capability at a wide FSR (Full Scale Range) in order to obtain sufficient signal dynamic range. Many earlier (...)
Design guide: PDF
Schematic: PDF
Reference designs

TIDA-01037 — 20-bit, 1-MSPS Isolator Optimized Data Acquisition Reference Design Maximizing SNR and Sample Rate

TIDA-01037 is a 20-bit, 1 MSPS isolated analog input data acquisition reference design that utilizes two different isolator devices to maximize signal chain SNR and sample rate performance. For signals requiring low jitter, such as ADC sampling clocks, TI’s ISO73xx family of low jitter (...)
Design guide: PDF
Schematic: PDF
Reference designs

TIDA-01035 — 20-bit Isolated Data Acquisition Reference Design Optimizing Jitter for Max SNR and Sample Rate

The TIDA-01035 is a 20-bit, 1 MSPS isolated analog input data acquisition reference design demonstrating how to resolve and optimize performance challenges typical of digitally isolated data acquisition systems.
  • Significantly improves high frequency AC signal chain performance (SNR  and THD) by (...)
Design guide: PDF
Schematic: PDF
Reference designs

TIPD211 — 20-bit, 1-MSPS, 4-Ch Small Form Factor Design for Test and Measurement Applications Reference Design

End equipment such as mixed signal SOC testers, memory testers, battery testers, liquid-crystal display (LCD) testers, benchtop equipment, high-density digital cards, high-density power cards, x-Ray, MRI, and so forth require multiple, fast, simultaneous sampling channels with excellent DC and AC (...)
Design guide: PDF
Schematic: PDF
Package Pins CAD symbols, footprints & 3D models
VQFN (RGE) 24 Ultra Librarian

Ordering & quality

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Information included:
  • Fab location
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