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ADC3668 ACTIVE 16-bit two-channel 250MSPS ADC with LVDS interface and up to 32768x decimation Lower power

Product details

Sample rate (max) (Msps) 250 Resolution (Bits) 16 Number of input channels 2 Interface type DDR LVDS, QDR LVDS Analog input BW (MHz) 900 Features High Performance Rating Catalog Peak-to-peak input voltage range (V) 2.5 Power consumption (typ) (mW) 1640 Architecture Pipeline SNR (dB) 75.8 ENOB (Bits) 12.03 SFDR (dB) 90 Operating temperature range (°C) -40 to 85 Input buffer Yes
Sample rate (max) (Msps) 250 Resolution (Bits) 16 Number of input channels 2 Interface type DDR LVDS, QDR LVDS Analog input BW (MHz) 900 Features High Performance Rating Catalog Peak-to-peak input voltage range (V) 2.5 Power consumption (typ) (mW) 1640 Architecture Pipeline SNR (dB) 75.8 ENOB (Bits) 12.03 SFDR (dB) 90 Operating temperature range (°C) -40 to 85 Input buffer Yes
VQFN (RGC) 64 81 mm² 9 x 9
  • Dual Channel
  • 14- and 16-Bit Resolution
  • Maximum Clock Rate: 250 MSPS
  • Analog Input Buffer with High Impedance Input
  • Flexible Input Clock Buffer with
    Divide-by-1, -2, and -4
  • 2-VPP and 2.5-VPP Differential Full-Scale Input (SPI-Programmable)
  • DDR or QDR LVDS Interface
  • 64-Pin VQFN Package (9-mm × 9-mm)
  • Power Dissipation: 820 mW/ch
  • Aperture Jitter: 85 fS
  • Internal Dither
  • Channel Isolation: 100 dB
  • Performance at fIN = 170 MHz at 2 VPP, –1 dBFS
    • SNR: 73.2 dBFS
    • SFDR:
      • 87 dBc (HD2 and HD3)
      • 100 dBc (Non HD2 and HD3)
  • Performance at fIN = 170 MHz:
    2.5 VPP, –1 dBFS
    • SNR: 74.9 dBFS
    • SFDR:
      • 85 dBc (HD2 and HD3)
      • 97 dBc (Non HD2 and HD3)
  • Dual Channel
  • 14- and 16-Bit Resolution
  • Maximum Clock Rate: 250 MSPS
  • Analog Input Buffer with High Impedance Input
  • Flexible Input Clock Buffer with
    Divide-by-1, -2, and -4
  • 2-VPP and 2.5-VPP Differential Full-Scale Input (SPI-Programmable)
  • DDR or QDR LVDS Interface
  • 64-Pin VQFN Package (9-mm × 9-mm)
  • Power Dissipation: 820 mW/ch
  • Aperture Jitter: 85 fS
  • Internal Dither
  • Channel Isolation: 100 dB
  • Performance at fIN = 170 MHz at 2 VPP, –1 dBFS
    • SNR: 73.2 dBFS
    • SFDR:
      • 87 dBc (HD2 and HD3)
      • 100 dBc (Non HD2 and HD3)
  • Performance at fIN = 170 MHz:
    2.5 VPP, –1 dBFS
    • SNR: 74.9 dBFS
    • SFDR:
      • 85 dBc (HD2 and HD3)
      • 97 dBc (Non HD2 and HD3)

The ADS42LB49 and ADS42LB69 are a family of high-linearity, dual-channel, 14- and 16-bit,
250-MSPS, analog-to-digital converters (ADCs) supporting DDR and QDR LVDS output interfaces. The buffered analog input provides uniform input impedance across a wide frequency range while minimizing sample-and-hold glitch energy. A sampling clock divider allows more flexibility for system clock architecture design. The ADS42LBx9 provides excellent spurious-free dynamic range (SFDR) over a large input frequency range with low-power consumption.

For all available packages, see the orderable addendum at the end of the datasheet.

The ADS42LB49 and ADS42LB69 are a family of high-linearity, dual-channel, 14- and 16-bit,
250-MSPS, analog-to-digital converters (ADCs) supporting DDR and QDR LVDS output interfaces. The buffered analog input provides uniform input impedance across a wide frequency range while minimizing sample-and-hold glitch energy. A sampling clock divider allows more flexibility for system clock architecture design. The ADS42LBx9 provides excellent spurious-free dynamic range (SFDR) over a large input frequency range with low-power consumption.

For all available packages, see the orderable addendum at the end of the datasheet.

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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet ADS42LBx9 14- and 16-Bit, 250-MSPS, Analog-to-Digital Converters datasheet (Rev. F) PDF | HTML 02 May 2016
Application note Correcting the Low-Frequency Response of the ADS42LBxx, ADS42JBxx for Time-Domai 02 May 2016
Application note Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) 22 May 2015
Application note Signal Chain Noise Figure Analysis 29 Oct 2014
Application note Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) 19 Jul 2013
Application note LMK04828 as a Clock Source for the ADS42JB69 14 Nov 2012
User guide Interfacing Altera FPGAs to ADS4249 and DAC3482 (TIDA-00069 Reference Guide) 10 Jul 2012

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

ADS42LB69EVM — ADS42LB69 Dual-Channel, 16-Bit 250-MSPS Analog-to-Digital Converter Evaluation Module

The ADS42LB69EVM is an evaluation module (EVM) that allows for the evaluation of Texas Instruments’ ADS42LB69. The ADS42LB69 is a low power, 16-bit, 250-MSPS analog to digital converter (ADC) with a buffered analog input and LVDS outputs. The EVM has transformer coupled analog and clock inputs to (...)

User guide: PDF
Not available on TI.com
GUI for evaluation module (EVM)

DATACONVERTERPRO-SW High Speed Data Converter Pro GUI Installer, v5.31

This high-speed data converter pro GUI is a PC (Windows® XP/7/10 compatible) program designed to aid in evaluation of most TI high-speed data converter [analog-to-digital converter (ADC) and digital-to-analog converter (DAC)] and analog front-end (AFE) platforms. Designed to support the entire (...)

Supported products & hardware

Supported products & hardware

GUI for evaluation module (EVM)

SLAC542 ADS42LBx9 GUI v2p0

Supported products & hardware

Supported products & hardware

Simulation model

ADS42LB69 IBIS Model

SLAM169.ZIP (31 KB) - IBIS Model
Calculation tool

ANALOG-ENGINEER-CALC PC software analog engineer's calculator

The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)

Supported products & hardware

Supported products & hardware

Design tool

SBAC119 TIGAR (Texas Instruments Graphical Evaluation of ADC Response Tool)

Supported products & hardware

Supported products & hardware

Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Package Pins CAD symbols, footprints & 3D models
VQFN (RGC) 64 Ultra Librarian

Ordering & quality

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