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ADS8902B

ACTIVE

20-bit, 500-kSPS, one-channel SAR ADC with internal VREF buffer, internal LDO and enhanced SPI

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Data sheet

ADS8902B

ACTIVE
Data sheet Order now

Product details

Resolution (Bits) 20 Sample rate (max) (ksps) 500 Number of input channels 1 Interface type Enhanced SPI, SPI Architecture SAR Input type Differential Rating Catalog Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 16 Analog supply voltage (min) (V) 3 Analog supply voltage (max) (V) 5.5 SNR (dB) 104.5 Digital supply (min) (V) 1.65 Digital supply (max) (V) 5.5
Resolution (Bits) 20 Sample rate (max) (ksps) 500 Number of input channels 1 Interface type Enhanced SPI, SPI Architecture SAR Input type Differential Rating Catalog Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 16 Analog supply voltage (min) (V) 3 Analog supply voltage (max) (V) 5.5 SNR (dB) 104.5 Digital supply (min) (V) 1.65 Digital supply (max) (V) 5.5
VQFN (RGE) 24 16 mm² 4 x 4
  • Resolution: 20-Bits
  • High Sample Rate With No Latency Output:
    • ADS8900B: 1-MSPS
    • ADS8902B: 500-kSPS
    • ADS8904B: 250-kSPS
  • Integrated LDO Enables Low-Power, Single-Supply Operation
  • Low Power Reference Buffer with No Droop
  • Excellent AC and DC Performance:
    • SNR: 104.5-dB, THD: –125-dB
    • DNL: ±0.2-ppm, 20-Bit No-Missing-Codes
    • INL: ±1-ppm
  • Wide Input Range:
    • Unipolar Differential Input Range: ±VREF
    • VREF Input Range: 2.5-V to 5-V
  • Enhanced-SPI Digital Interface
    • Interface SCLK : 22-MHz at 1-MSPS.
    • Configurable Data Parity Output.
  • Extended Temperature Range: –40°C to +125°C
  • Small Footprint: 4-mm × 4-mm VQFN
  • Resolution: 20-Bits
  • High Sample Rate With No Latency Output:
    • ADS8900B: 1-MSPS
    • ADS8902B: 500-kSPS
    • ADS8904B: 250-kSPS
  • Integrated LDO Enables Low-Power, Single-Supply Operation
  • Low Power Reference Buffer with No Droop
  • Excellent AC and DC Performance:
    • SNR: 104.5-dB, THD: –125-dB
    • DNL: ±0.2-ppm, 20-Bit No-Missing-Codes
    • INL: ±1-ppm
  • Wide Input Range:
    • Unipolar Differential Input Range: ±VREF
    • VREF Input Range: 2.5-V to 5-V
  • Enhanced-SPI Digital Interface
    • Interface SCLK : 22-MHz at 1-MSPS.
    • Configurable Data Parity Output.
  • Extended Temperature Range: –40°C to +125°C
  • Small Footprint: 4-mm × 4-mm VQFN

The ADS8900B, ADS8902B, and ADS8904B (ADS890xB) belong to a family of pin-to-pin compatible, high-speed, single-channel, high-precision, 20-bit successive-approximation-register (SAR) analog-to-digital converters (ADCs) with an integrated reference buffer and integrated low-dropout regulator (LDO). The device family includes the ADS891xB (18-bit) and ADS892xB (16-bit) resolution variants.

The ADS89xxB boosts analog performance while maintaining high-resolution data transfer by using TI’s Enhanced-SPI feature. Enhanced-SPI enables ADS89xxB in achieving high throughput at lower clock speeds, there by simplifying the board layout and lowering system cost. Enhanced-SPI also simplifies the host’s clocking-in of data there by making it ideal for applications involving FPGAs, DSPs. ADS89xxB is compatible with standard SPI Interface.

The ADS89xxB has an internal data parity feature which can be appended to the ADC data output. ADC data validation by the host, using parity bits, improves system reliability.

The ADS8900B, ADS8902B, and ADS8904B (ADS890xB) belong to a family of pin-to-pin compatible, high-speed, single-channel, high-precision, 20-bit successive-approximation-register (SAR) analog-to-digital converters (ADCs) with an integrated reference buffer and integrated low-dropout regulator (LDO). The device family includes the ADS891xB (18-bit) and ADS892xB (16-bit) resolution variants.

The ADS89xxB boosts analog performance while maintaining high-resolution data transfer by using TI’s Enhanced-SPI feature. Enhanced-SPI enables ADS89xxB in achieving high throughput at lower clock speeds, there by simplifying the board layout and lowering system cost. Enhanced-SPI also simplifies the host’s clocking-in of data there by making it ideal for applications involving FPGAs, DSPs. ADS89xxB is compatible with standard SPI Interface.

The ADS89xxB has an internal data parity feature which can be appended to the ADC data output. ADC data validation by the host, using parity bits, improves system reliability.

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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet ADS890xB 20-Bit, High-Speed SAR ADCs With Integrated Reference Buffer, and Enhanced Performance Features datasheet (Rev. A) PDF | HTML 29 Jun 2017
Application note Attenuator Amplifier Design to Maximize the Input Voltage of Differential ADCs 14 Jun 2018
Application brief Improving Input Settling for Precision Data Converters 12 Dec 2017
Application brief Optimizing Data Transfer on High-Resolution, High-Throughput Data Converters 12 Dec 2017
Application brief Simplify Isolation Designs Using an Enhanced-SPI ADC Interface 11 Dec 2017
White paper Enabling Faster, Smarter, and More Robust Solutions for SAR ADSx With multiSPI 08 Nov 2016

Design & development

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Evaluation board

ADS8900BEVM-PDK — ADS8900B Fully-Differential Input, 20-Bit SAR ADC EVM Performance Demonstration Kit (PDK)

The ADS8900B evaluation module (EVM) performance demonstration kit (PDK) is a platform for evaluating the performance of the ADS8900B successive-approximation register (SAR) analog-to-digital converter (ADC), which is a fully-differential input, 20-bit, 1-MSPS device. (...)

User guide: PDF | HTML
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Simulation model

ADS8902B PSpice Model

SBAM483.ZIP (12241 KB) - PSpice Model
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Simulation model

ADS8902B TINA-TI Reference Design

SBAM309.TSC (7021 KB) - TINA-TI Reference Design
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Simulation model

ADS8902B TINA-TI Spice Model

SBAM308.TSM (25 KB) - TINA-TI Spice Model
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Simulation model

ADS890XB IBIS Model (Rev. A)

SBAM305A.ZIP (16 KB) - IBIS Model
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Calculation tool

ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)

Supported products & hardware

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Design tool

ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
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Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
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Reference designs

TIPD211 — 20-bit, 1-MSPS, 4-Ch Small Form Factor Design for Test and Measurement Applications Reference Design

End equipment such as mixed signal SOC testers, memory testers, battery testers, liquid-crystal display (LCD) testers, benchtop equipment, high-density digital cards, high-density power cards, x-Ray, MRI, and so forth require multiple, fast, simultaneous sampling channels with excellent DC and AC (...)
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